Back in 2004 and 2005, the national labs looked at extreme computing frontiers An important new workshop is being organized to match the continuum of important supercomputing applications with over-the-horizon computing methods fostered by the approaching nanoscale devices and to determine the limits of practical computing imposed by the constraints of basic physics and technology. Although not asserting a particular target performance value, a roadmap for staging advances coordinated with likely technology progress will be developed that will traverse the end of the reign of transistorized microprocessors and cross in to the domain of post-transistor nanotech devices and reversible logic at the end of the next decade. But even beyond this, participants will consider the factors determining the ultimate capabilities and what technologies may enable them and the problems these supercomputers will solve.
Identify the physical limits of supercomputer classes in use today, such as clusters, MPPs, and other approaches, based on the principles of physics and available roadmaps.
Identify other classes of computation that may succeed the baseline technologies based on:
New architectures, such as Field Programmable Gate Arrays (FPGA), Processor in Memory (PIM), the Vector architecture (reborn), and others.
New devices capable of computing, such as RSFQ, CNFET, RTD, SET, Y-junctions, Moltronics, Quantum Dots, spintronics, and other devices of which the participants may be aware.
New ways of using devices, such as adiabatic logic design or reversible logic.
A 2006 paper looking at technology on the lane to Zettaflops This looks at conventional silicon approaches to a zettaflop system based on expected 2020 roadmap capabilities. (such a system would still need an exabyte of memory at a minimum, over a gigawatt of power and insane amounts of silicon). They look at Quantum dot Cellular automata (QCA) zettaflop systems. They examine reversible computing and suggest 5 year, 2010-2015, and 2015-2025 plans. Reversible computing needs to be solved and implemented to get to reasonable power levels.
Zettaflops are a billion teraflops, a million petaflops, a thousand exaflops.
Things to do with a 10 petaflop computer.
A discussion of Japan’s plans for a 10 petaflop machine and then 100 petaflop and then an exaflop
The 10 petaflop timeline is a conceptual design in fiscal 2006.
– Then, a detailed design and circuit design.
– Manufacturing will start in April 2010.
– Assembly in the summer 2010
– the computer will be partially completed by March 2011.
– Partial operation will start from April 2011 along with system enhancement.
– The computer will be completed by March 2012
– It is to be in full operation from April 2012.
A speed of 10 petaflops is too slow to simulate the whole body including tissue, blood flow, and movement. We will have to continue our development towards 100-petaflop, then exaflop machines (one exa = 10 to the power of 18).