1. Dr. Tae-Su Jang, member of technical staff in the Hynix R&D Division, will deliver the paper on June 17, 2009 that highlights the operating characteristics of Z-RAM memory technology fabricated on a 50nm DRAM process. Using a 54nm x 54nm floating-body memory bitcell, the paper presents the longest floating-body retention time reported – longer than 8 seconds at 93 degrees Celsius – as well as an extremely large programming window of 1.6 volts. These improvements were obtained through DRAM technology optimizations such as junction engineering, thermal treatments, and improved passivation processes. The paper concludes by demonstrating the suitability of floating body memories for DRAM applications
Z-RAM, short for “zero capacitor RAM” is a new type of computer memory in development by Innovative Silicon Inc. Z-RAM offers performance similar to the standard six-transistor SRAM cell used in cache memory but uses only a single transistor, therefore offering much higher densities. Z-RAM offers twice the density of DRAM, and five times that of SRAM. Although Z-RAM’s individual cells are not as fast as SRAM, the lack of the long lines allows a similar amount of cache to be run at roughly the same data rates by avoiding this delay while taking up less space. Response times as low as 3ns have been stated.
Technological innovations in superior cell architectures, new materials, and advanced deposition techniques such as atomic layer deposition (ALD) will be required to enable the continued growth in flash memory. As a result, technology development efforts in the flash memory market parallel leading research in logic transistor development, such as the use of high-k dielectrics and work function engineered metal gates. Furthermore, novel memory architectures utilizing phase change materials and ferroelectric thin films are being investigated to respond to the mounting scaling challenges of non-volatile memory (NVM) cells.
Flash accounted for 8% of the total $277 billion semiconductor industry in 2008, and is expected to post higher than average growth rates of 18% annually. The demand for memory capacity has resulted in aggressive scaling of flash memory cells far in excess of projections by the International Technology Roadmap for Semiconductors (ITRS).
FeRAM is shown above on the right. Several alternative technologies, like FeRAM, can potentially provide faster programming times, lower programming voltages and increased endurance over Flash.
Phase Change Memory
Chalcogenide-based phase change memory (PCM) is another alternative novel memory being actively investigated. Phase change can occur on the order of 10nsec and the material can be cycled between 10^9 and 10^13 times — considerably in excess of the 10^6 write/erase cycles required by modern day flash technologies. Besides speed, endurance and low voltage operation, PCM memory is highly scalable. Because PCM memory uses a deposited thin-film structure that is not inherently tied to the silicon substrate, there is potential to stack these memory arrays on back-end metallization layers, resulting in higher densities. Denser arrays and the need for low thermal budgets and high conformality have resulted in active study of ALD techniques for the deposition of GST, resistive heater metal layers and post-GST dielectrics.