Silicon and Gallium nitride have been used to create a single hybrid microchip. This will allow transistors to be made smaller and sets of several chips made of different material in a cellphone can be combined into a single chip This is also an advance towards photonics on a chip which are needed for high speed interchip communication and for zettaflop computers. It could take a couple of years to get to the point where it could be commercialized.
Results: An MIT team led by Tomás Palacios, assistant professor in the Department of Electrical Engineering and Computer Science, has succeeded in combining two semiconductor materials, silicon and gallium nitride, that have different and potentially complementary characteristics, into a single hybrid microchip. This is something researchers have been attempting to do for decades.
Why it matters: This advance could point to a way of overcoming fundamental barriers of size and speed facing today’s silicon chips. “We won’t be able to continue improving silicon by scaling it down for long,” Palacios says, so it’s crucial to find other approaches. Besides microprocessor chips, the new integrated technology can be used for other applications such as hybrid chips that combine lasers and electronic components on a single chip, and energy-harvesting devices that can harness the pressure and vibrations from the environment to produce enough power to run the silicon components. It could also lead to more efficient cell phone manufacturing, replacing four or five separate chips made from different semiconductor materials. “With this technology, you could potentially integrate all these functions on a single chip,” Palacios says.
Source: “Seamless On-Wafer Integration of Si(100) MOSFETs and GaN HEMTs,” Jinwook W. Chung, Tomás Palacios, et al, IEEE Electron Device Letters, October 2009
The chips can be manufactured using the standard fab technology currently used for commercial silicon chips. Currently they are one inch square chips so they have to scale up the process to 6, 8 and 12 inch wafer sizes.
The faster chip is also highly efficient— most of the transistors operate at slower speeds consuming less energy.
Thomas Kazior, technical director of Advanced Microelectronics Technology at Raytheon Integrated Defense Systems, said “this provides a path to RF ‘systems on a chip.”
The technology can also be used for combining lasers and electronic components on a single chip, and accommodate energy-harvesting devices that can harness the pressure and vibrations from the environment to produce enough power to run the silicon components.