HPCwire covers unleashing the Memristor
EEtimes covers the Nanoletters paper on two memristors being used to emulate neural learning
HP claims memristor memory can handle up to 1,000,000 read/write cycles before degradation, compared to flash at 100,000 cycles. Memristors can be scaled down to single-digit nanometer geometries, memristors should leave NAND and NOR based flash memories in the dust.
HP also discovered that memristors can serve as logic circuits, so now there's talks of using the devices for computation. This could open the door to building processors with logic and very large memories integrated together on the same die. (The best we can do today is marry CPUs and relatively small caches.) In fact, memristor-based processors could be a dream come true for processor-in-memory (PIM) enthusiasts.
Targeting Cat Scale Brains with Memristors
A cat cortex and contains 1 billion spiking neurons and 10 trillion individual learning synapses. Those cat level are about 100 times lower in neurons and synapses as a human brain.
According to the University of Michigan researchers led by Professor Wei Lu, memristors respond to these simultaneous voltage pulses--called spike timing dependent plasticity--in a manner nearly identical to that of brain synapses, making them a viable alternative to supercomputer simulations. Massive crossbar networks of memristors, proposed by HP Labs researchers could create a more accurate and much faster executing emulation of brain functions than supercomputer simulations. "We are building a computer in the same way that nature builds a brain," said Lu, an assistant professor in the U-M Department of Electrical Engineering and Computer Science. "The idea is to use a completely different paradigm compared to conventional computers. The cat brain sets a realistic goal because it is much simpler than a human brain but still extremely difficult to replicate in complexity and efficiency."
Today's most sophisticated supercomputer can accomplish certain tasks with the brain functionality of a cat, but it's a massive machine with more than 140,000 central processing units and a dedicated power supply. And it still performs 83 times slower than a cat's brain, Lu wrote in his paper.
In a mammal's brain, neurons are connected to each other by synapses, which act as reconfigurable switches that can form pathways linking thousands of neurons. Most importantly, synapses remember these pathways based on the strength and timing of electrical signals generated by the neurons.
Lu has connected two electronic circuits with one memristor. He has demonstrated that this system is capable of a memory and learning process called "spike timing dependent plasticity." This type of plasticity refers to the ability of connections between neurons to become stronger based on when they are stimulated in relation to each other. Spike timing dependent plasticity is thought to be the basis for memory and learning in mammalian brains.
"We show that we can use voltage timing to gradually increase or decrease the electrical conductance in this memristor-based system. In our brains, similar changes in synapse conductance essentially give rise to long term memory," Lu said.
The next step is to build a larger system, Lu said. His goal is achieve the sophistication of a supercomputer in a machine the size of a two-liter beverage container. That could be several years away.
Previous IBM Cat Brain Emulation controversy IEEE spectrum summarizes the cat brain emulation controversy
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