In a research paper, titled “Proposal for all-graphene monolithic logic circuits,” the UCSB researchers say that “devices and interconnects can be built using the ‘same starting material’ — graphene,” and, perhaps more excitingly, “all-graphene circuits can surpass the static performances of the 22nm complementary metal-oxide-semiconductor devices.” To build an all-graphene IC, the researchers propose using one of graphene’s interesting qualities, that depending on its thickness it behaves in different ways. Narrow ribbons of graphene are semiconducting, ideal for making transistors — while wider ribbons are metallic, ideal for gates and interconnects.
For now, UCSB’s design is just that — a computer model that should technically work, but which hasn’t been built yet. In theory, though, with the worldwide efforts to improve high-quality graphene production and patterning, we should be able to build an all-graphene IC in the next few years. Even then, though, it will still take a long time to go from laboratory prototype to full-scale commercial production — perhaps a decade or more. For the time being, the higher electron mobility of III-V semiconductors compared to silicon should provide a stopgap solution for the continuing miniaturization and ultra-low-power requirements of modern computing. When graphene ICs do finally take off, though, we have terahertz switching speeds and transistor densities in the tens-of-billions to look forward to.
Since the very inception of integrated circuits, dissimilar materials have been used for fabricating devices and interconnects. Typically, semiconductors are used for devices and metals are used for interconnecting them. This, however, leads to a “contact resistance” between them that degrades device and circuit performance, especially for nanoscale technologies. This letter introduces and explores an “all-graphene” device-interconnect co-design scheme, where a single 2-dimensional sheet of monolayer graphene is proposed to be monolithically patterned to form both active devices (graphene nanoribbon tunnel-field-effect-transistors) as well as interconnects in a seamless manner. Thereby, the use of external contacts is alleviated, resulting in substantial reduction in contact parasitics. Calculations based on tight-binding theory and Non-Equilibrium Green’s Function (NEGF) formalism solved self-consistently with the Poisson’s equation are used to analyze the intricate properties of the proposed structure. This constitutes the first NEGF simulation based demonstration that devices and interconnects can be built using the “same starting material” – graphene. Moreover, it is also shown that all-graphene circuits can surpass the static performances of the 22 nm complementary metal-oxide-semiconductor devices, including minimum operable supply voltage, static noise margin, and power consumption.