Ray Kurzweil, director of engineering at Google, says that in the 2030s we will have brain implants that will help us connect to the cloud, allowing us to pull information from the internet. Information will also be able to sent up over those networks, letting us back up our own brains.
As the cloud that our brains access improves, our thinking would get better and better, Kurzweil said. So while initially we would be a “hybrid of biological and non-biological thinking”, as we moved into the 2040s, most of our thinking will be non-biological.
Kurweil is describing particular kinds of brain prosthetics. There is substantial work going on with electronics that communicates with the brain.
Artificial hippocampus used for communicating memories to the brain of rats and monkeys, human trials soon
Theodore Berger and his colleagues at the University of Southern California in Los Angeles have developed a working hippocampal prosthesis that passed the live tissue test in 2004. In 2011, in collaboration with Drs. Sam A. Deadwyler and Robert E. Hampson at Wake Forest Baptist Medical Center, a proof-of-concept hippocampal prosthesis was successfully tested in live rats. The prosthesis is in the form of multisite electrodes positioned to record from both the input and output "sides" of the damaged hippocampus, the input is gathered and analyzed by external computation chips, an appropriate feedback is computed, then used to stimulate the appropriate output pattern in the brain so that the prosthesis functions like a real hippocampus. In 2012, the team of Berger, Deadwyler and Hampson tested a further implementation in Macaques prefrontal cortex, further developing the neural prosthesis technology. In 2013, Hampson et al. successfully tested a hippocampal prosthesis on non-human primates. While the device does not yet consist of a fully implantable "chip," these tests, from rat to monkey, demonstrate the effectiveness of the device as a neural prosthetic, and the labs plan to begin human trials in a few years.
PBS Nova provides an update on the Berger and Kahana brain memory enhancing prosthetic work in 2015.
When the team watched and didn’t activate the device, the rats performed the trial correctly 80% of the time. But when they switched on the device that provided the proper CA1 signal, the accuracy rate jumped to 95%. They also found that they could interfere with the memory, too, by stimulating the CA1 neurons with an incorrect signal. Then, accuracy dropped to 75%, according to results published in the Journal of Neural Engineering.
Berger worked his mathematical magic on the output from the electrodes, the researchers found that they could, once again, predict CA1 activity based on input from CA3 neurons. The researchers also found that the monkeys made mistakes in very predictable ways. When they saw an image surrounded by a circle, they sometimes selected the image in the bottom left of the screen. They made a similar error when the square was shown first, picking the matching image instead of the one in the correct location. Neural activity during these mistakes revealed the same type of encoding errors they saw in the rats.
In a follow-up experiment with the monkeys, they used the device to override the incorrect signals from the CA3 neurons. Again, they found that the device significantly improved the accuracy of the macaques in the behavioral test.
“The information that goes into the device would normally be processed by the hippocampus, but the device substitutes for that processing. We’re not putting in anything that isn’t already there, and we’re not telling the brain things like ‘remember an apple’ or ‘remember a face.’ It simply strengthens the normal memory processing that’s already there,” Hampson says.
However, it will be at least several more years until the device is ready to test in humans. For one, they have to create electrodes that can be used in humans and figure out how to insert them without damaging other parts of the brain. They also have to develop a reliable power source for the device. And before anyone can use it, researchers also have to record the activity of CA1 and CA3 neurons to be able to insert the correct signal. None of these are easy tasks.
At the University of Pennsylvania, theoretical neuroscientist Michael Kahana is developing a device that would boost the signal in the hippocampus when the brain is trying to encode a memory. When researchers stimulated a region of the hippocampus called the entorhinal cortex in individuals undergoing surgery for epilepsy, the subjects’ memories improved significantly.
It’s still not clear whether a memory prosthetic would be able to activate the whole, complex range of a memory.
While both the scientists and funding agencies envision these devices for use in individuals with brain damage from Alzheimer’s disease or a traumatic brain injury, they also have the potential to be used by healthy individuals.
Nonlinear Cognitive Signal Processing in Ultralow-Power Programmable Analog Hardware
Ted Berger and his team published in 2015 on a programmable ultralow-power analog neural signal processing system. The analog hardware implements a nonlinear model that can replicate and predict, in real time, the temporal neural codes used in complex brain functions. The transistors of the analog circuits operate in weak inversion. A digital control system is used to program model parameters and calibrate mismatches. The chip was implemented in a 130-nm complementary metal-oxide-semiconductor technology and occupies an area of 1 square millimeter. The power consumption of the system is 120 nW. The modular design allows for easy scaling to achieve large-scale hardware systems that emulate spike transformations of populations of neurons.
DARPA is spending over $100 million on brain project and brain memory prosthetics are part of it
DARPA researching brain implants to restore lost memory which is part of US $100 million human brain research project. DARPA has provided $37.5 million to fund the new Restoring Active Memory (RAM) Project.
Restoring Active Memory (RAM) - DARPA seeks new methods for analysis and decoding of neural signals in order to understand how neural stimulation could be applied to facilitate recovery of memory encoding following brain injury. Ultimately, it is desired to develop a prototype implantable neural device that enables recovery of memory in a human clinical population. Additionally, the program encompasses the development of quantitative models of complex, hierarchical memories and exploration of neurobiological and behavioral distinctions between memory function using the implantable device versus natural learning and training.
The ultimate goal of the Restoring Active Memory (RAM) Program is to develop, fabricate, test, and validate a prototype device programmed to mitigate neural dysfunction in the injured brain.
The following is a nominative list of memory components that the model should distinguish:
• Attributes: Memory of sensory characteristics of objects or events or the contexts in which they occur.
• Categories: High-level semantic classification of sets of objects or events with similar characteristics.
• Associations: Two or more components (i.e., attributes or categories) linked to one another in a memory, occurring either simultaneously or across a temporal dimension (e.g., chronological order).
Neural dust could make a long duration, low power brain machine interface with thousands of sensor connections at the 10-100 micron scale.
A major hurdle in brain-machine interfaces (BMI) is the lack of an implantable neural interface system that remains viable for a lifetime. This paper explores the fundamental system design trade-offs and ultimate size, power, and bandwidth scaling limits of neural recording systems built from low-power CMOS circuitry coupled with ultrasonic power delivery and backscatter communication. In particular, we propose an ultra-miniature as well as extremely compliant system that enables massive scaling in the number of neural recordings from the brain while providing a path towards truly chronic BMI.
These goals are achieved via two fundamental technology innovations:
1) thousands of 10 – 100 micron scale, free-floating, independent sensor nodes, or neural dust that detect and report local extracellular electrophysiological data, and
2) a sub-cranial interrogator that establishes power and communication links with the neural dust.
For 100 micron scale sensing nodes embedded 2 mm into the brain, ultrasonic power transmission can enable 7 % efficiency power links (-11.6 dB), resulting in a received power of 500 microwatts with a 1 square mm interrogator, which is over 10 million times more than EM transmission at similar scale (40 pW). Extreme efficiency of ultrasonic transmission and CMOS front-ends can enable the scaling of the sensing nodes down to 10’s of microns
(dec 2014) A Minimally Invasive 64-Channel Wireless μECoG Implant
Emerging applications in brain-machine interface systems require high-resolution, chronic multisite cortical recordings, which cannot be obtained with existing technologies due to high power consumption, high invasiveness, or inability to transmit data wirelessly. In this paper, we describe a microsystem based on electrocorticography (ECoG) that overcomes these difficulties, enabling chronic recording and wireless transmission of neural signals from the surface of the cerebral cortex. The device is comprised of a highly flexible, high-density, polymer-based 64-channel electrode array and a flexible antenna, bonded to 2.4 mm × 2.4 mm CMOS integrated circuit (IC) that performs 64-channel acquisition, wireless power and data transmission. The IC digitizes the signal from each electrode at 1 kS/s with 1.2 μV input referred noise, and transmits the serialized data using a 1 Mb/s backscattering modulator. A dual-mode power-receiving rectifier reduces data-dependent supply ripple, enabling the integration of small decoupling capacitors on chip and eliminating the need for external components. Design techniques in the wireless and baseband circuits result in over 16× reduction in die area with a simultaneous 3× improvement in power efficiency over the state of the art. The IC consumes 225 μW and can be powered by an external reader transmitting 12 mW at 300 MHz, which is over 3× lower than IEEE and FCC regulations.