Hewlett-Packard researchers have designed a faster, more energy-efficient chip by packing in more transistors–without shrinking them. Instead of using aluminum wiring that take up a lot of space beside transistors, they used crossbar nanowire mesh that goes on top to connect the transistors. HP’s design has the potential to be easily integrated into a chip-making facility. By 2010, the technology should be ready for manufacturing.
The first application of the technology will most likely be in a type of chip called field-programmable gate arrays (FPGAs), which have the flexibility to be programmed to complete a variety of tasks. FPGAs are typically used in the design stages of electronics and communication systems. However, once the bugs are worked out of the design, manufacturers replace FPGAs with faster, cheaper chips called application-specific integrated circuits (ASICs). Reducing the size and cost of FPGAs and increasing their speed has the potential to shift the balance between FPGAs and ASICs,
Brian Wang is a Futurist Thought Leader and a popular Science blogger with 1 million readers per month. His blog Nextbigfuture.com is ranked #1 Science News Blog. It covers many disruptive technology and trends including Space, Robotics, Artificial Intelligence, Medicine, Anti-aging Biotechnology, and Nanotechnology.
Known for identifying cutting edge technologies, he is currently a Co-Founder of a startup and fundraiser for high potential early-stage companies. He is the Head of Research for Allocations for deep technology investments and an Angel Investor at Space Angels.
A frequent speaker at corporations, he has been a TEDx speaker, a Singularity University speaker and guest at numerous interviews for radio and podcasts. He is open to public speaking and advising engagements.