Optical Quantum Computing and a Complete Methods Set for Scalable Ion Trap Quantum Information Processing

1. New Scientist reports that the codebreaking quantum computer algorithm (shors algorithm for factoring) has been run on a silicon chip.

Journal Science abstract: Shor’s Quantum Factoring Algorithm on a Photonic Chip

Shor’s quantum factoring algorithm finds the prime factors of a large number exponentially faster than any other known method, a task that lies at the heart of modern information security, particularly on the Internet. This algorithm requires a quantum computer, a device that harnesses the massive parellism afforded by quantum superposition and entanglement of quantum bits (or qubits). We report the demonstration of a compiled version of Shor’s algorithm on an integrated waveguide silica-on-silicon chip that guides four single-photon qubits through the computation to factor 15.

BBC News reports: The Bristol team’s approach makes use of waveguides – channels etched into the chips that provide a path for the photons around the chips like the minuscule wires in conventional electronics.

The work, reported in Science, is rudimentary but could easily be scaled up to handle more complex computing.

While Professor O’Brien said he is confident that such waveguides are the logical choice for future optical quantum computers, he added that there is still a significant amount of work to do before they make it out of the laboratory.

“To get a useful computer it needs to be probably a million times more complex, so a full-scale useful factoring machine is still at least two decades away,” he said.

“But this is one important step in that direction.”


The device performs a compiled version of the quantum routine in Shor’s algorithm.

A study demonstrates that complex quantum circuits can be built relatively easily out of silicon and silica – a significant milestone on the road to full-blown quantum computing.

Fifteen years ago, Peter Shor, a computer scientist at the Massachusetts Institute of Technology, predicted that quantum computers could beat even the most powerful supercomputers and crack the widely used RSA encryption algorithm.

The 26-millimetre-long chip was designed and built using standard fabrication processes by Jeremy O’Brien, Jonathan Matthews and Alberto Politi at the University of Bristol, UK. It can run Shor’s algorithm in cut-down form – confirming that 3 and 5 multiply to form 15, which is the simplest possible demonstration.

Unlike the silicon chips inside conventional computers, the Bristol team’s chip uses light rather than electricity. Light-transmitting silica on a silicon wafer guides photons with entangled quantum properties around, an approach first demonstrated by the same team last year.

White points out that the technology used to generate individual photons to feed into the chip, and to detect them as they emerge, is not efficient, fast or compact enough yet. Although the new chip is only 26 mm long, it has to be surrounded by a whole table top of that equipment.

2 pages of supplemental information on photonic quantum computing.

2. Abstract from Journal Science: Complete Methods Set for Scalable Ion Trap Quantum Information Processing

Large-scale quantum information processors must be able to transport and maintain quantum information and repeatedly perform logical operations. Here, we show a combination of all of the fundamental elements required to perform scalable quantum computing through the use of qubits stored in the internal states of trapped atomic ions. We quantified the repeatability of a multiple-qubit operation and observed no loss of performance despite qubit transport over macroscopic distances. Key to these results is the use of different pairs of 9Be+ hyperfine states for robust qubit storage, readout, and gates, and simultaneous trapping of 24Mg+ “re-cooling” ions along with the qubit ions.

The Supporting Online Materials provide further details about the sympathetic cooling, the use of state-dependent forces to implement a geometric phase gate using multiple motional modes, transfer between the gate and memory qubit manifolds, state detection and error analysis for quantum process tomography. [4 pages of Supplemental information]