Intel, Micron Make 25-nm NAND chip as Moore Law Marches On

EEtimes reports Intel Corp. and Micron Technology Inc. have regained the process technology lead in NAND flash, by rolling out the first in a family of 25-nm devices.

The first 25-nm NAND device is a multi-level-cell (MLC), 8-GB device, which is said to reduce IC count by 50 percent over previous products. With the device, measuring 167-mm2, the Intel-Micron duo will retake the NAND process lead over the SanDisk-Toshiba duo and Samsung Electronics Co. Ltd., which have recently announced 32-nm and 30-nm products, respectively. Another player, Hynix Semiconductor Inc., has a 26-nm device waiting in the wings.

The 25-nm device is made at IM Flash Technologies LLC, a joint NAND fab venture between Intel (Santa Clara) and Micron (Boise, Ida.). Intel and Micron will initially ramp the 25-nm NAND device at IM Flash, followed by production within Micron’s fab in Manassas, Va. Still to be seen, however, is when IM Flash will restart its delayed NAND fab in Singapore. Some analysts say that fab will ramp in 2011.

In theory, today’s 193-nm immersion scanners supposedly hit the wall around 35-nm. IM Flash has been able to devise 25-nm NAND chips with today’s 193-nm immersion lithography, plus self-aligned double-patterning (SADP) techniques, observers speculated. It is widely believed that IM Flash is using scanners from ASML Holdings NV and SADP technology, observers speculated.

IM Flash may also be using a form of phase-shift mask technology. ”With the chip industry staying on Moore’s Law and lithography stuck at the 193-nm wavelength, chipmakers are looking to double-patterning to drive linewidth shrinks,” according to a recent report from Barclays Capital.

”SADP is the technology of choice in NAND, with all players adopting SADP at the 32-nm node. In our view, SADP was really the only choice due to (i) inadequate overlay and line edge roughness capabilities of the then existing litho tools, (ii) the simple nature of NAND 1-D structure, and (iii) availability of excess etch and CVD tool capacity,” according to the report.

”Looking to the 22-nm node, our checks suggest that SADP is the preferred option for all the major NAND manufacturers as development is already underway and litho tools by themselves alone are not yet ready to satisfy the requirements at 22-nm,” according to the report.