MIT Technology review has details of IBMs progress to develop racetrack memory Racetrack memory’s reliability is likely to depend on the materials used for the nanowires, and the design—which will be worked out as a prototype is developed. “It shouldn’t take too long,” Parkin says. “Maybe in two years we should have this prototype.” Racetrack memory would combine the capacity of a magnetic hard disk with the speed, size, and ruggedness of flash memory.
Memristors are also a candidate for denser and faster memory than flash.
In 2008, the journal Science published a paper coauthored by Parkin that showed how multiple domain walls can traverse the length of a nanowire without being destroyed. The new work, also published in Science, specifies the velocity and acceleration of domain walls as they make their way along a nanowire when an electrical current is applied.
“There’s been debate among theorists about how domain walls will respond,” says Parkin. Researchers understood the motion of domain walls when they were exposed to magnetic fields, but they still had questions about how domain walls move in response to an electrical current—a crucial point because an actual memory device would use electrical current to manipulate bits. One important question was whether domain walls would behave like particles with mass, taking time to speed up and slow down.
The new research shows that they do. It took about 10 nanoseconds, and a distance of a micron, for a domain wall to reach its final velocity, about 140 meters per second. It took another 10 nanoseconds, and one micron, for the domain wall to slow to a stop after the current was turned off. Thus domain walls do indeed behave like particles with mass, and move in a predictable way.
The researchers were careful to use electrical pulses that were just a few nanoseconds in length. If they had used pulses whose duration was similar to the time it takes the domain wall to reach its final velocity, then the acceleration of the domain wall wouldn’t have been measurable.
“It is extremely important to account for these effects in clocking schemes of racetrack memory,” says Shan Wang, professor of materials science and engineering and electrical engineering at Stanford, referring to the algorithms that would control the reading and writing of bits in a racetrack memory device. “Otherwise, domain walls … would be written in wrong locations of the nanowire.”
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