Intel Xeon Phi Steps towards Exascale Computing in late 2012

At the International Supercomputing Conference today, Intel announced that Knights corner, the company’s first commercial Many Integrated Core (MIC) product will ship commercially in 2012. The Descendent of the processor formerly known as Larrabee also gets a new brand name — Xeon Phi.

The Xeon Phi alone will deliver an estimated 800GFlops of double-precision floating point performance (the total figure of 1TFlop includes the two Xeon E5 processors in the system).

PC World – The Phi chip will be used in a supercomputer called Stampede, which could go live as early as the end of this year at the Texas Advanced Computing Center at the University of Texas. The supercomputer will deliver peak performance of 10 petaflops (or 10,000 trillion operations per second). The E5 processors will take on 20 percent of the supercomputer’s performance, while Knights Corner will handle 80 percent of the load.

To get to exascale, about 40 to 50 gigaflops of performance-per-watt is needed, and the first Phi chip would deliver roughly four to five gigaflops per watt, said John Hengeveld, director of marketing for high-performance computing at Intel.

The first Xeon Phi chip, also called Knights Corner, is made using the 22-nanometer process, which is the same manufacturing technology used to make some of the latest Core laptop and desktop processors. The chip sits in a PCI-Express 2.0 slot and combines vector processing units with standard CPU cores.

Intel has been talking about the Knights Corner chip — then called the MIC (many integrated cores) chip — since 2010. The chip came out of Intel’s research and development laboratory, and was designed with size, complexity and power consumption in mind.

“They started that with very small dumb cores,” McGregor said.

Price and availability for Knights Corner was not announced. Intel’s Hengeveld said further details about the chip will be provided last this year.

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