Extreme Ultraviolet Lithography hopes for hitting 10 nanometer node in 2016 and hopes to lower cost by six times for the 5 nanometer node

The latest extreme ultraviolet (EUV) lithography systems are making about 28 wafers per hour or 100 wafers per day with a 40 W light source in pilot tests. The progress is significant but falls far short of a production target of up to 200 wafers per hour for the systems upon which ride many of the hopes of the semiconductor industry.

ASML chief technology officer Martin Van den Brink reported the results achieved over the last three months, raising hopes for a handful of EUV proponents at the annual Imec Technology Forum here. The systems could be available as early as 2016 in time for the 10 nanometer node, Van den Brink said, but it’s a nail biter at best, given the many challenges ahead.

EUV aims to help chipmakers avoid the costly need to pattern wafers three or four times with existing immersion systems to get the 10 nm features they will need in about two years. The low throughput due to the relatively weak light source is the biggest of several problems for EUV.

“Over time I am convinced we will get to 100-200 wafers/hour with higher numerical aperature — that will give us another 10 years” of new chipmaking capabilities, Van den Brink said.

Initially, ASML hopes to stabilize the systems for commercial production at about 85 wafers/hour for work at 10 or 7 nm nodes. Ultimately it hopes to deliver systems producing 100 to 200 wafers/hour with a higher numerical aperature, better resists, and an improved light source, slashing costs as much as sixfold for the 5 nm node.

EUV needed to get back to lowering costs for computers

Uptime has doubled to about 20% since TSMC’s February talk, and ASML has a system in its lab that could run an 80 W light source by the end of the year, Ronse said. It hopes to hit “160 to 180 W by the end of next year, and that’s really sufficient for high-volume, cost-effective manufacturing.”

Intel signaled some time ago it sees a cost effective route to 10 nm chips without EUV. However, it is not saying how it would reduce the need for triple or quad patterning.

Without EUV, “there is no real Plan B,” said Ronse, noting the complexity and costs of alignment, focus control, and optical proximity correction with triple and quad patterning. “No one will tolerate these costs — you are not on Moore’s Law anymore.”

SOURCE – EETimes

If you liked this article, please give it a quick review on ycombinator or StumbleUpon. Thanks

logo

Don’t miss the latest future news

Subscribe and get a FREE Ebook