IARPA funding the scaling of superconducting computing for energy efficient exaflop computing

The Intelligence Advanced Research Projects Activity (IARPA) invests in high-risk, high-payoff research programs to tackle some of the most difficult challenges of the agencies and disciplines in the Intelligence Community (IC). IARPA is investing in breakthrough superconducting computing to enable energy efficient exaflop supercomputers. They could make an exaflop supercomputer that use 2 megawatts or less. The Cryogenic Computing Complexity (C3) is the name of the superconducting computer project.

Conventional computing systems, which are based on complementary metal-oxide-semiconductor (CMOS) switching devices and normal metal interconnects, appear to have no path to be able to increase energy efficiency fast enough to keep up with increasing demands for computation.

Superconducting computing could offer an attractive low-power alternative to CMOS with many potential advantages. Josephson junctions, the superconducting switching devices, switch quickly (~1 ps), dissipate little energy per switch (< 10^-19 J), and communicate information via small current pulses that propagate over superconducting transmission lines nearly without loss. While, in the past, significant technical obstacles prevented serious exploration of superconducting computing, recent innovations have created foundations for a major breakthrough. For example, the new single flux quantum (SFQ) logic circuits have no static power dissipation, and new energy efficient cryogenic memory ideas allow operation of memory and logic within the cold environment. Studies indicate that superconducting supercomputers may be capable of 1 PFLOP/s for about 25 kW and 100 PFLOP/s for about 200 kW, including the cryogenic cooler. Proof at smaller scales is an essential first step before any attempt to build a supercomputer. Early research suggests superconducting logic can switch at speeds north of 770GHz as shown by work at MIT

Success with the superconducting computing would also first enable Petaflop superworkstations or servers that only needed about 25 kilowatts of power.

Shown here is a square-centimeter chip containing the nTron adder, which performed the first computation using the researchers’ new superconducting circuit. Image: Adam N. McCaughan

Superconducting computing research currently consists of a few, scattered efforts with no initiative focused on advancing the field overall. Major research challenges include insufficient memory, insufficient integration density, and no realization of complete computing systems. The C3 Program will address these challenges with the goal of establishing superconducting computing as a long-term solution to the power- cooling problem and a successor to end-of-roadmap CMOS for high performance computing. Success of C3 will pave the way to a new generation of superconducting computers that are far more energy efficient than end-of-roadmap CMOS and scalable to practical application.

IARPA expects that the C3 program will be a five-year, two-phase program. Phase one, which encompasses the first three years, serves primarily to develop the technologies that are required to demonstrate a small superconducting processor. Phase two, for the final two years, will integrate those new technologies into a small-scale working model of a superconducting computer.

C3 Program thrusts will include:

Cryogenic memory: New approaches to enable high performance computing systems with greatly improved memory capacity and energy efficiency.

Logic, communications and systems: Development of advanced superconducting circuits and integration with memory and other components for demonstration of a limited superconducting computer system on which to measure performance metrics.
IARPA expects that each proposal will address fully a single thrust. If a proposer wishes to propose against more than one thrust, then separate proposals should be submitted. Proposals are not desired that address only a small portion of a thrust’s goals. Collaborative efforts and teaming among potential performers will be strongly encouraged. Participation is open to individuals and organizations from around the world so long as the prime contractor is a US organization

MIT nTron work

Superconductors are ordinary materials cooled to extremely low temperatures, which damps the vibrations of their atoms, letting electrons zip past without collision. Berggren’s lab focuses on superconducting circuits made from niobium nitride, which has the relatively high operating temperature of 16 Kelvin, or minus 257 degrees Celsius. That’s achievable with liquid helium, which, in a superconducting chip, would probably circulate through a system of pipes inside an insulated housing, like Freon in a refrigerator.

A liquid-helium cooling system would of course increase the power consumption of a superconducting chip. But given that the starting point is about 1 percent of the energy required by a conventional chip, the savings could still be enormous.
Cheap superconducting circuits could also make it much more cost-effective to build single-photon detectors, an essential component of any information system that exploits the computational speedups promised by quantum computing.

Engineered to a T

The nanocryotron — or nTron — consists of a single layer of niobium nitride deposited on an insulator in a pattern that looks roughly like a capital “T.” But where the base of the T joins the crossbar, it tapers to only about one-tenth its width. Electrons sailing unimpeded through the base of the T are suddenly crushed together, producing heat, which radiates out into the crossbar and destroys the niobium nitride’s superconductivity.

A current applied to the base of the T can thus turn off a current flowing through the crossbar. That makes the circuit a switch, the basic component of a digital computer.

After the current in the base is turned off, the current in the crossbar will resume only after the junction cools back down. Since the superconductor is cooled by liquid helium, that doesn’t take long. But the circuits are unlikely to top the 1 gigahertz typical of today’s chips. Still, they could be useful for some lower-end applications where speed isn’t as important as energy efficiency.

Their most promising application, however, could be in making calculations performed by Josephson junctions accessible to the outside world. Josephson junctions use tiny currents that until now have required sensitive lab equipment to detect. They’re not strong enough to move data to a local memory chip, let alone to send a visual signal to a computer monitor.

In experiments, McCaughan demonstrated that currents even smaller than those found in Josephson-junction devices were adequate to switch the nTron from a conductive to a nonconductive state. And while the current in the base of the T can be small, the current passing through the crossbar could be much larger — large enough to carry information to other devices on a computer motherboard.
“I think this is a great device,” says Oleg Mukhanov, chief technology officer of Hypres, a superconducting-electronics company whose products rely on Josephson junctions. “We are currently looking very seriously at the nTron for use in memory.”

“There are several attractions of this device,” Mukhanov says. “First, it’s very compact, because after all, it’s a nanowire. One of the problems with Josephson junctions is that they are big. If you compare them with CMOS transistors, they’re just physically bigger. The second is that Josephson junctions are two-terminal devices. Semiconductor transistors are three-terminal, and that’s a big advantage. Similarly, nTrons are three-terminal devices.”

“As far as memory is concerned,” Mukhanov adds, “one of the features that also attracts us is that we plan to integrate it with magnetoresistive spintronic devices, mRAM, magnetic random-access memories, at room temperature. And one of the features of these devices is that they are high-impedance. They are in the kilo-ohms range, and if you look at Josephson junctions, they are just a few ohms. So there is a big mismatch, which makes it very difficult from an electrical-engineering standpoint to match these two devices. NTrons are nanowire devices, so they’re high-impedance, too. They’re naturally compatible with the magnetoresistive elements.”

Some other Research

Nature – Hybrid superconducting-magnetic memory device using competing order parameters

In a hybrid superconducting-magnetic device, two order parameters compete, with one type of order suppressing the other. Recent interest in ultra-low-power, high-density cryogenic memories has spurred new efforts to simultaneously exploit superconducting and magnetic properties so as to create novel switching elements having these two competing orders. Here we describe a reconfigurable two-layer magnetic spin valve integrated within a Josephson junction. Our measurements separate the suppression in the superconducting coupling due to the exchange field in the magnetic layers, which causes depairing of the supercurrent, from the suppression due to the stray magnetic field. The exchange field suppression of the superconducting order parameter is a tunable and switchable behaviour that is also scalable to nanometer device dimensions. These devices demonstrate non-volatile, size-independent switching of Josephson coupling, in magnitude as well as phase, and they may enable practical nanoscale superconducting memory devices.

There was a 2005 technology assessment of supercomputing using superconductors.

SOURCES – IARPA, MIT

Subscribe on Google News