An all memristor chip, built by researchers at the University of California, Santa Barbara, and Stony Brook University, processes data not with digital logic circuits but with elements that mimic, in simplified form, the neurons and synapses of biological brains. When a network like that is exposed to new data, it “learns” as the synapses that connect neurons adjust the neurons’ influence on one another.
Robert Legenstein, an associate professor at Graz University of Technology in Austria, wrote: “If this design can be scaled up to large network sizes, it will affect the future of computing … Laptops, mobile phones and robots could include ultra-low-power neuromorphic chips that process visual, auditory and other types of sensory information.
Brain-inspired—or “neuromorphic”—chips have been made before, and IBM is trying to commercialize them. They generally use the same silicon transistors and digital circuits that make up ordinary computer processors. But those digital components are not suited to mimicking synapses, says Dmitri Strukov, an assistant professor at the University of California, Santa Barbara, who led work on the new memristor chip. Many transistors and digital circuits are needed to represent a single synapse. By contrast, each of the 100 or so synapses on the UCSB chip is represented using only a single memristor.
“A [biological] synapse is an analog memory device, and there is really no good way of implementing that in a compact, energy-efficient way with conventional technology,” says Strukov. “Memristors by themselves are an analog memory device; it’s a perfect match.”
The UCSB group’s simple chip is just a proof of concept, but the researchers believe their techniques can be scaled up to make larger, more powerful devices. Strukov says the technology could get a helping hand from the efforts companies such as HP and SK Hynix are making to commercialize memristors for data storage.
HP should be able to scale memristor chips to billions and even trillions.
This circuit can learn to recognize simple black-and-white patterns, thanks to devices called memristors located at each place the wires cross.
Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10^14 synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors whose nonlinear current–voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm22 to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.
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