DARPA Risers Max Shulaker (Stanford) explains his ongoing research into enabling much faster, lower-power microchips. He spoke at DARPA’s “Wait, What?” forum on Sept. 10, 2015.
The 3D design enables scientists to interweave memory, which stores data, and the number-crunching processors in the same tiny space, said Max Shulaker, one of the designers of the chip, and a doctoral candidate in electrical engineering at Stanford University in California
The main roadblock to faster computers is not flagging processor speed, but a memory problem, Shulaker said.
Big-data analysis requires the computer to draw some tiny piece of data from some previously unknown spot in truly staggering troves of data. Then, the computer must shuttle that information via an electrical signal back and forth across the (relatively) vast inches of wire between the computer’s memory (typically a hard drive) and the processors, facing the speed bump of electrical resistance along the entire path.
“If you try to run that in your computer, you would spend over 96 percent of the time just being idle, doing absolutely nothing,” Shulaker said. “You’re wasting an enormous amount of power.” While the Central Processing Unit (CPU) waits for a piece of data to make the return trip from the memory, for instance, the computer is still hogging power, even though it’s not calculating a thing.
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SOURCES – Youtube, DARPA, Stanford
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