IBM and Samsung have fast STT-MRAM which could replace flash memory

IBM colleagues and Samsung have published a paper demonstrating switching MRAM cells for devices with diameters ranging from 50 down to 11 nanometers in only 10 nanoseconds, using only 7.5 microamperes.

“With PMA we are capable of delivering good STT-MRAM performance down to 7×10^-10 write-error-rate with 10 nanosecond pulses using switching currents of only 7.5 microampere. This could never be done with in-plane magnetized devices — they just don’t scale. While more research needs to be done, this should give the industry the confidence it needs to move forward. The time for Spin Torque MRAM is now,” said Worledge.

STT-MRAM is 100,000 times faster than NAND flash and never wears out.

It falls into a performance sweet spot compared to other memory technologies and this level makes it viable to manufacture.

Spin-torque MRAM can be used for a new type of working memory in ultra-low power applications. For example, it can be used in IoT or mobile devices, where it uses very low power when it’s on and storing information, and when it’s not actively being used, it uses zero power because it’s not volatile.

Worledge said he doesn’t believe that IBM’s STT MRAM will replace DRAM anytime soon, but he said it can easily replace embedded flash, since MRAM is easier to embed, is faster and has unlimited reads and writes.

IEEE Magnetic Letters – Dependence of Voltage and Size on Write Error Rates in Spin-Transfer Torque Magnetic Random-Access Memory

IBM scientist Janusz Nowak co-authored the paper on scaling STT MRAM down to 11nm. Here, Nowak holds an MRAM wafer. Credit: IBM


The dependence of the write-error rate (WER) on the applied write voltage, write pulse width, and device size was examined in individual devices of a spin-transfer torque (STT) magnetic random-access memory (MRAM) 4 kbit chip. We present 10 ns switching data at the 10-6 error level for 655 devices, ranging in diameter from 50 nm to 11 nm, to make a statistically significant demonstration that a specific magnetic tunnel junction stack with perpendicular magnetic anisotropy is capable of delivering good write performance in junction diameters range from 50 to 11 nm. Furthermore, write-error-rate data on one 11 nm device down to an error rate of 7×10-10 was demonstrated at 10 ns with a write current of 7.5 μA, corresponding to a record low switching energy below 100 fJ.

SOURCES – IEEE Magnetic Letters, IBM, Computerworld