Toshiba Corporation has disclosed the latest generation of its BiCS FLASH three-dimensional (3D) flash memory with a stacked cell structure, a 64-layer device that it claims as the first to start sample shipments.
The new device incorporates 3-bit-per-cell (triple-level cell, TLC) technology and achieves a 256-gigabit (32 gigabytes) capacity, an advance that underscores the potential of Toshiba’s proprietary architecture. Toshiba continues to refine BiCS FLASH, and the next milestone on the development roadmap is a 512-gigabit (64-gigabytes) device, also with 64 layers.
Mass production of 64-layer BiCS FLASH is scheduled to start in the first half of 2017.
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