TSMC actively developing three dimensional stacked architecture for 5 nanometer process and investing for 3 and 1 nanometer manufacturing process

CTimes reports that Taiwan Semiconductor Manufacturing (TSMC) said yesterday that the company will actively develop 5 nanometers process technology, while putting about 300 to 400 R and D personnel in developing more advanced 3-nanometer process, and toward the 1-nanometer manufacturing process.

Dr. Mark Liu, President and Co-Chief Executive Officer of TSMC, said that the original Moore’s law will reach bottlenecks of 7-nanometer, however, TSMC uses its three-dimensional stacked architecture technology to break the limitation of the Moore’s law and move toward 3-nm manufacturing process.

Liu stressed that TSMC has established the complete ecosystems with the intellectual property, automation solutions and equipment providers, and will continue to invest in technology development and research, and to make Taiwan become the strongest fortress in the global semiconductor industry.

He also said that the role of Taiwan’s semiconductor industry became more and more important in the global semiconductor market with the share of 21%, where its output ranks first place in the foundry, IC packaging and testing business, and IC design ranks the world’s second and the Fourth in memory production. Manufacturers only need one day to complete all the relevant hardware procurement in Taiwan.

SOURCES – Ctimes