Closer to Flash Memory Successor

New resistive random access memory (RRAM), could form the basis of a better kind of nonvolatile computer memory, where data is retained even when the power is off. Nonvolatile memory is already familiar as the basis for flash memory in thumb drives, but flash technology has essentially reached its size and performance limits. For several years, the industry has been hunting for a replacement.

RRAM could surpass flash in many key respects: It is potentially faster and less energy-intensive. It also could pack far more memory into a given space—its switches are so small that a terabyte could be packed into a space the size of a postage stamp. But RRAM has yet to be broadly commercialized because of technical hurdles that need addressing.

RRAM switches are flipped on and off by an electrical pulse that moves oxygen ions around, creating or breaking a conductive path through an insulating oxide. NIST research shows that shorter, less energetic pulses are more effective at moving the ions the right amount to create distinct on/off states, potentially minimizing the longstanding problem of state overlap that has kept RRAM largely in the R&D stage. Credit: Hanacek and Nminibapiel/NIST

One hurdle is its variability. A practical memory switch needs two distinct states, representing either a one or a zero, and component designers need a predictable way to make the switch flip. Conventional memory switches flip reliably when they receive a pulse of electricity, but we’re not there yet with RRAM switches, which are still flighty.

“You can tell them to flip and they won’t,” said NIST guest researcher David Nminibapiel. “The amount needed to flip one this time may not be enough the next time around, but if you use too much energy and overshoot it, you can make the variability problem even worse. And even if you flip it successfully, the two memory states can overlap, making it unclear whether the switch has a one or a zero stored.”

This randomness cuts into the technology’s advantages, but in two recent papers, the research team has found a potential solution. The key lies in controlling the energy delivered to the switch by using multiple, short pulses instead of one long pulse.

Typically, chip designers have used relatively strong pulses of about a nanosecond in duration. The NIST team, however, decided to try a lighter touch—using less energetic pulses of 100 picoseconds, about a tenth as long. They found that sending a few of these gentler signals was useful for exploring the behavior of RRAM switches as well as for flipping them.

“Shorter pulses reduce the variability,” Nminibapiel said. “The issue still exists, but if you tap the switch a few times with a lighter ‘hammer,’ you can move it gradually, while simultaneously giving you a way to check it each time to see if it flipped successfully.”

Because the lighter touch does not push the switch significantly from its two target states, the overlapping issue can be significantly reduced, meaning one and zero can be clearly distinguished. Nminibapiel added that the use of shorter pulses also proved instrumental to uncovering the next serious challenge for RRAM switches—their instability.

“We achieved high endurance, good stability and uniformity comparable to using longer pulse widths,” he said. “Instability affects our ability to maintain the memory state, though. Eliminating this instability is a problem for another day, but at least we’ve clarified the problem for the next round of research.”

IEEE Electron device letters – Impact of RRAM Read Fluctuations on the Program-Verify Approach

The stochastic nature of the conductive filaments in oxide-based resistive memory resistive random access memory (RRAM) represents a sizeable impediment to commercialization. As such, program-verify methodologies are highly alluring. However, it was recently shown that the program-verify methods are unworkable due to strong resistance state relaxation after SET/RESET programming. In this letter, we demonstrate that resistance state relaxation is not the main culprit. Instead, it is fluctuation-induced false-reading (triggering) that defeats the program-verify method, producing a large distribution tail immediately after programming. The fluctuation impact on the verify mechanism has serious implications on the overall write/erase speed of RRAM.