New silicon photonics will cut data center power by up to 50% and increase supercomputer speed

New optical modulators (the device that encodes digital information onto a light signal) use 100 times less energy than commercial modulators and the research modulators are only 5% of the size of the commercial devices.

The new on chip photonic devices use much cheaper starting material, the new technique’s use of standard manufacturing processes means that chipmakers interested in adding photonic components to their devices won’t have to do much extra work.

Startup Ayar Labs has already managed to commercialize earlier 2015 research and is worked with chip giant GlobalFoundries in late 2017 to produce an optical input-output system due to launch in 2019. Ayar Labs is targeting power-hungry data centers where the new devices could cut power use by 30 to 50 percent. They will also increase the speed and efficiency of supercomputers.

Nature – Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip

Electronic and photonic technologies have transformed our lives—from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions. This goal is hindered by the fact that most silicon nanotechnologies—which enable our processors, computer memory, communications chips and image sensors—rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal–oxide–semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centers and high-performance computing. By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions, but with the performance, complexity and scalability of ‘systems on a chip. As transistors smaller than ten nanometres across become commercially available9, and as new nanotechnologies emerge, this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

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