IEEE Roadmap Leads to One Nanometer Devices in 2033

The IEEE International Roadmap for Devices and Systems (IRDS) has a roadmap to one-nanometer semiconductor devices in 2033.

The updated IRDS includes new information on cryogenic electronics and quantum information processing, added benchmarks for applications, and supplemental information and metrics from the More Moore team. There is an update to Beyond CMOS and updates for emerging devices, outside systems connectivity technology, factory integration (including smart manufacturing and security topics), metrology, and yield enhancement. Market drivers for medical devices and a new automotive market drivers report are also included.

Beyond CMOS are potential future digital logic technologies that expand beyond the present CMOS scaling limits. These limits are designed to keep device intensity and speeds in check in an effort to combat heating effects.

Digital logic is a fundamental component in the creation of electronic and logic devices. It’s what allows us to create circuits, check computer chips, and perform other functions that are necessary to a system’s success. The acronym CMOS is short for complementary metal oxide semiconductor. These are classic semiconductor devices of the past fifty years.

Beyond CMOS are future technologies concerning digital logic, or future technologies, which is what we rely on to represent the sequences and signals within a digital circuit. These technologies are anticipated to stretch beyond the present CMOS scaling limits, which have already spanned over an order of magnitude in feature size and two orders of magnitude in speed.

2 thoughts on “IEEE Roadmap Leads to One Nanometer Devices in 2033”

  1. I think those two effects contributes to the heat or the slowing of sub 20nm cmos devices. So far though; cleverness has prevailed, and while silicon mosfets may not get to sub 1nm other technologies might and I think thats what this article is trying to explain.

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