A Si–Gr–Ge transistor has been demonstrated. The Schottky emitter provides an emitter charging time of ~118 ps with a current of 692 A cm−2 and a capacitance of 41 nF cm−2, which is expected to increase the alpha cutoff frequency from the previous ~1 MHz by using tunnel emitters to over 1 GHz by using the Schottky emitter in a graphene-base transistor. With further engineering, the vertical semiconductor–graphene–semiconductor transistor is promising for high-speed applications in future 3D monolithic integration because of the advantages of the atomic thickness and high carrier mobility of graphene, and the high feasibility of a Schottky emitter.
Graphene-base transistors have been proposed for high-frequency applications because of the negligible base transit time induced by the atomic thickness of graphene. However, generally used tunnel emitters suffer from high emitter potential-barrier-height which limits the transistor performance towards terahertz operation. To overcome this issue, a graphene-base heterojunction transistor has been proposed theoretically where the graphene base is sandwiched by silicon layers. Here we demonstrate a vertical silicon-graphene-germanium transistor where a Schottky emitter constructed by single-crystal silicon and single-layer graphene is achieved. Such Schottky emitter shows a current of 692 A cm−2 and a capacitance of 41 nF cm−2, and thus the alpha cut-off frequency of the transistor is expected to increase from about 1 MHz by using the previous tunnel emitters to above 1 GHz by using the current Schottky emitter. With further engineering, the semiconductor-graphene-semiconductor transistor is expected to be one of the most promising devices for ultra-high frequency operation.
Fabrication of the single-layer graphene film
A 20 × 10 mm2 piece of Pt foil (250-μm-thick, Alfa, 99.99 wt% metal) was rinsed with DI water, acetone, and ethanol in sequence for 1 h each, loaded into a quartz holder inside the fused silica tube (inner diameter: 22 mm) of a tube furnace (Lindberg Blue M, Thermo Scientific), and then annealed at 1000 °C for 10 min to remove residual carbon or organic substances under a hydrogen atmosphere. Growth was then initiated and maintained for 40 min under a mixture of CH4 (4.5 sccm) and H2 (500 sccm) at 1000 °C. Finally, the Pt foil was quickly pulled out of the high-temperature zone, and the CH4 flow was turned off when the furnace temperature was below 800 °C29,30,31.
Transfer of the single-layer graphene film
For bubbling transfer of the graphene film, a Pt substrate with the grown graphene was spin-coated with PMMA (950 kDa molecular weight, Sigma, 4 wt% in ethyl lactate) at 2000 r.p.m. for 60 s, and then cured at 180 °C for 15 min. A constant current of 0.2 A was applied to separate the PMMA/graphene layer from the Pt foil in a 1 M NaOH aqueous solution. The PMMA/graphene films were then collected on the target substrates, and finally acetone was used to remove the PMMA at 50 °C29,30,31.
Patterning of the Ge substrate
A 30-nm-thick Al2O3 insulator layer was deposited on top of an n-type Ge substrate (resistivity: ~1 Ω cm for a lightly doped sample, ~0.1 Ω cm for a heavily doped one) by atomic layer deposition (ALD) at 150 °C (precursors: trimethylaluminum (TMA) and water). Au electrode was formed on the top of Al2O3. The bottom of the Ge substrate was scratched, and Au metallization was performed to form an Ohmic contact. The Al2O3 layer was patterned by photolithography and etching with dilute HF (5 wt%) for 3 min, leaving an ~60 × 60 μm2 window to the Ge substrate.
Fabrication of the Si–Gr–Ge transistor
Single-layer graphene and Si membranes were fabricated and transferred to the Ge substrate one after the other. The graphene was patterned to ensure isolation of each device by photolithography and O2 plasma etching (200 W, 180 sccm, 2 min).