Finally, Commercialization of Wafers of Carbon Nanotube Transistor Chips

Carbon nanotube field-effect transistors or CNFETs can now be made 1100 times faster so significant commercialization will finally happen. CNFETs are more energy-efficient than silicon field-effect transistors and could be used to build new types of three-dimensional microprocessors.

They found that dry cycling, a method of intermittently drying out the submerged wafer, could dramatically reduce the incubation time — from 48 hours to 150 seconds.

After analyzing the deposition technique used to make the CNFETs, Max Shulaker, an MIT assistant professor of electrical engineering and computer science, and his colleagues made some changes to speed up the fabrication process by more than 1,100 times compared to the conventional method, while also reducing the cost of production. The technique deposited carbon nanotubes edge to edge on the wafers, with 14,400 by 14,400 arrays CFNETs distributed across multiple wafers.

A 3D computer chip with combined logic and memory functions is projected to “beat the performance of a state-of-the-art 2D chip made from silicon by orders of magnitude.

Nature Electronics – Fabrication of carbon nanotube field-effect transistors in commercial silicon manufacturing facilities


Carbon nanotube field-effect transistors (CNFETs) are a promising nanotechnology for the development of energy-efficient computing. Despite rapid progress, CNFETs have only been fabricated in academic or research laboratories. A critical challenge in transferring this technology to commercial manufacturing facilities is developing a suitable method for depositing nanotubes uniformly over industry-standard large-area substrates. Such a deposition method needs to be manufacturable, compatible with today’s silicon-based technologies, and provide a path to achieving systems with energy efficiency benefits over silicon. Here, we show that a deposition technique in which the substrate is submerged within a nanotube solution can address these challenges and can allow CNFETs to be fabricated within industrial facilities. By elucidating the mechanisms driving nanotube deposition, we develop process modifications to standard solution-based methods that significantly improve throughput, accelerating the deposition process by more than 1,100 times, while simultaneously reducing cost. This allows us to fabricate CNFETs in a commercial silicon manufacturing facility and high-volume semiconductor foundry. We demonstrate uniform and reproducible CNFET fabrication across industry-standard 200 mm wafers, employing the same equipment currently being used to fabricate silicon product wafers.

SOURCES- MIT, Nature Electronics
Written By Brian Wang,

5 thoughts on “Finally, Commercialization of Wafers of Carbon Nanotube Transistor Chips”

  1. I could see somebody like Apple making a hybrid system where a very lower power nanotube CPU was used when the CPU loads were low but you could switch a process to a high power silicon CPU as needed.

    Also putting the memory next to the CPU (literally and figuratively) is in keeping with the ethos of GPUs so there is a possibility there.

    Finally I recall that the BTC cost is a function of power used so lower power, higher throughput chips could be good there.

  2. They have distinct advantages – handle double the current and take 1/5 the energy to switch so they have great potential as communication chips (especially wireless). Look for them to start replacing specialty gallium based chips as their first commercial use.

  3. Try, but i would give it 5 more years of development before being ready to consumers. And afaik there is no 3d prototypes of chips, it would be nice to see a 2d chip with amazing low power consumption and “good” performance first, i think we could see a 32 bit processor on the next 2 years in the lab.

  4. Yeah, maybe not really commercially viable yet. 1.2 trillion transistors on silicon 200mm wafers vs. 120 million carbon nanotube ones

Comments are closed.