Hyper Efficient Analog AI Chip

Imec’s Analog in Memory Computing (AiMC) architecture (a new AI chip) is optimized to perform deep neural network calculations on in-memory computing hardware in the analog domain. Achieving record-high energy efficiency up to 2,900 TOPS/W, the accelerator is a key enabler for inference-on-the-edge for low-power devices. The privacy, security and latency benefits of this new technology will have an impact on AI applications in a wide range of edge devices, from smart speakers to self-driving vehicles.

This technology should be able evolve towards 10,000 TOPS/W.