TSMC Pushing to 2 Nanometers While Intel is at 10 nm and China at 14 nm in Low Volume

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TSMC evolutionary N4 process will enter risk production later in 2021 and will be used for mass production in 2022.

80% of TSMC’s $30 billion capital budget this year will be spent on expanding capacities for advanced technologies, such as 3nm, 4nm/5nm, and 6nm/7nm. N5 capacity will increase to 110,000 to 120,000 wafers per month.

TSMC’s N3 promises to increase performance by 10% – 15% (at the same power and complexity) or reduce power consumption by 25% – 30% (at the same performance and complexity). All the while the new node will also improve transistor density by 1.1 ~ 1.7 times depending on the structures (1.1X for analog, 1.2X for SRAM, 1.7X for logic).

Gate-all-around FETs (GAAFETs) are still a part of TSMC’s development roadmap. The company is expected to use a new kind of transistors with its ‘post-N3’ technology (presumably N2). In fact, the company is in path-finding mode for next generations of materials and transistor structures that will be used many years down the road.

TSMC has set a 3-year $100 billion CapEx/R&D investment plan, starting from 2021.

China and Intel Are Falling Behind in Semiconductors

Intel has released a 10 nanometer server chip. In 2023, Intel will release its first 7 nanometer chip for PCs.

TSMC and Samsung are now targeting mass production with 3nm process technology in 2022. China’s SMIC [Semiconductor Manufacturing International Corporation Incorporated] is talking about 7nm but is unable to manage 10nm. China can design advanced chips but cannot make them.

Shanghai government aims to have scaled production of 12-nanometre semiconductors in 2021. SMIC can make 12 nm chips and could make 14 nm chips at the end 2019. SMIC claims to be able to manufacture fairly advanced 14-nm chips, it is not really ready for commercial production at this level.

China has 7 nm chip designs but has to get them fabricated by others.

SMIC is making large volumes of 28 nanometer chips.

China is prevented from buying EUV (extreme ultraviolet) lithography equipment.

Intel is permitted to buy and has bought EUV equipment but has failed to work out the factory and other issues for competitive designs at scale.

SOURCES- TSMC, Asiatimes, CNBC, Digitimes, Enterprise AI, Anandtech, Arstechnica
Written By Brian Wang, Nextbigfuture.com

5 thoughts on “TSMC Pushing to 2 Nanometers While Intel is at 10 nm and China at 14 nm in Low Volume”

  1. Certainly might tip the scales in terms of ensuring US intervention should Taiwan need help with any unwelcome would-be guests.

  2. From the BWah's linked article

    And also goes some way to explaining why, despite TSMC offering a nominally 7nm process, the general consensus has been that Intel’s 10nm design is pretty much analogous.

    So it's like comparing an Audi A6 to a BMW 7 Series to a Mazda RX8. The numbers don't refer to anything objective so saying one is clearly better than the other is silly.

    There ARE objective measures of goodness, but that's not what's in these headlines.

  4. Right now the only metrics that still make physical sense are gates per area, and power/performance.

    The experts acknowledge TSMC is above the rest of the industry in those terms, but I wouldn't pay much attention to the nm labels anymore.

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