Strong Quantum Computational Advantage Using a Superconducting Quantum Processor

Scaling up to a large number of qubits with high-precision control is essential in the demonstrations of quantum computational advantage to exponentially outpace the classical hardware and algorithmic improvements. Chinese researchers develop a two-dimensional programmable superconducting quantum processor, Zuchongzhi, which is composed of 66 functional qubits in a tunable coupling architecture. To characterize the performance of the whole system, we perform random quantum circuits sampling for benchmarking, up to a system size of 56 qubits and 20 cycles.

Above – Device schematic of the Zuchongzhi quantum processor. (a) The Zuchongzhi quantum processor consists of two saphire chips. One carries 66 qubits and 110 couplers, and each qubit couples to four neighboring qubits except those at the boundaries. The other hosts the readout components and control lines as well as wiring. These two chips are aligned and bounded together with indium bumps. (b) Simplified circuit schematic of the qubit and coupler

The computational cost of the classical simulation of this task is estimated to be 2-3 orders of magnitude higher than the previous work on 53-qubit Sycamore processor. They estimate that the sampling task finished by Zuchongzhi in about 1.2 hours will take the most powerful supercomputer at least 8 years. Our work establishes an unambiguous quantum computational advantage that is infeasible for classical computation in a reasonable amount of time. The high-precision and programmable quantum computing platform opens a new door to explore novel many-body phenomena and implement complex quantum algorithms.

The Zuchongzhi quantum processor consists of 66 qubits, arrayed in 11 rows and 6 columns forming a two dimensional rectangular lattice pattern as depicted in the device schematic. The quantum processor uses Transmon qubits, which are essentially non-linear oscillators with their non-linearity originating from superconducting Josephson effect.

Each qubit, except those at the boundaries, has four tunable couplers to couple to its nearest neighbors, with tunable coupling that can be turned on and off with fast control. The tunable couplers are also Transmon qubits, with frequencies several GHz higher than that of the data qubits and always stays at ground states. A magnetic flux bias line is provided for each coupler to fast tune the coupling strength g between neighboring qubits continually from ∼ +5 MHz to ∼ −50 MHz. Each qubit dispersively couples to a readout resonator which couples to a Purcell filter shared between six qubits, frequency multiplexing is used to readout the qubit states simultaneously.

All the quantum circuit components of our quantum processor are fabricated on two separate sapphire chips, which are then stacked together with the indium bump flip-chip technique. The quantum processor chip is wire bounded to a circuit board, mounted into a well shielded cryostat, and connected to room temperature control electronics through various microwave components in the wiring.

All the 66 qubits and 110 couplers on the quantum processor function properly. Rough calibration results for all these 66 qubits, including their decoherence time T1 (average 30.6 microseconds at idle frequencies), single-qubit gate (average 99.86%), two-qubit gate (average 99.24%), readout (average 95.23%), are provided in the Supplemental Material. In this work, they select 56 qubits to demonstrate the random circuit sampling, which are optimized to achieve an optimal computational complexity in the classical simulation.

They designed, fabricated, measured, and benchmarked a state-of-the-art 66-qubit superconducting quantum processor that is fully programmable through electric control. They were able to achieve high-fidelity logic operations of the full quantum circuit and eliminate the unwanted cross talk. The experimental results of random quantum circuit with 56 qubits and 20 cycles on Zuchongzhi quantum processor established a new record to challenge the classical computing capability. The performance of the whole system behaves as predicted when system size grows from small to large, confirming the highfidelity quantum operations and low correlated errors on the Zuchongzhi processor. The quantum processor has a scalable architecture that is compatible with surface-code error correction, which can act as the test-bed for fault-tolerant quantum
computing. They expect this large-scale, high-performance quantum processor could enable them to pursue valuable NISQ quantum applications beyond classical computers in the near future.