{"id":17814,"date":"2010-02-09T01:11:00","date_gmt":"2010-02-09T01:11:00","guid":{"rendered":"http:\/\/198.74.50.173\/2010\/02\/isscc-silicon-could-scale-to-79.html"},"modified":"2017-04-07T05:24:44","modified_gmt":"2017-04-07T05:24:44","slug":"isscc-silicon-could-scale-to-79","status":"publish","type":"post","link":"https:\/\/www.nextbigfuture.com\/2010\/02\/isscc-silicon-could-scale-to-79.html","title":{"rendered":"ISSCC – Silicon Could Scale to 7.9 nanometers, Graphene Favorite for Post-CMOS and Call to Increase Energy Efficiency 100 Times"},"content":{"rendered":"
EETimes reports from International Solid State Circuit Conference (ISSCC)<\/a><\/p>\n For processors, silicon could scale to the 7.9-nm node, which is slated for 2024.<\/p>\n Reasons Graphene is the post-CMOS Favorite by James Meindl, director of the Joseph M. Pettit Microelectronics Research Center : <\/p>\n 1. Graphene has a mechanical strength-to-weight ratio exceeding that of any known material.
\n2. Carrier mobility exceeds 200,000-cm2\/Vs.
\n3. Carriers with zero effective mass that propagate as ‘Dirac fermions’ in a manner similar to photons with a velocity 300 times less than the speed of light without scattering for distances in the micrometer range.
\n4. The capacity to conduct current densities as large as one thousand times greater than copper without electromigration.
\n5. Record values of more than 5,000W\/mK for room temperature thermal conductivity.
\n6. The capability to serve as a source, channel drain regions of a field effect transistor (FET) and as an interconnect.\n<\/p><\/blockquote>\n