D-Wave Systems has commercially sold 2000 qubit quantum annealing systems.

D-Wave System announced reverse annealing. Reverse annealing lets programmers start the search for the best solution at a localized spot in solution space. The system will then focus on the area which may be more promising for the best answer.D-Wave enables users to have more control of qubits during the annealing process.

Reverse annealing allows users to start systematic searches for the best answer based upon their understanding of the solution space. It circumvents limitations on the number of qubits or the entanglement time by starting new searches in different locations.

D-Wave is working on a 5000 qubit system now and will likely install it with a customer in less than 2 years. They are also working to broaden connectivity on their chips.

Nextbigfuture believes that D-Wave Systems makes their larger qubit systems about 2 years in advance of when such systems are shipped to customers. If D-Wave has not already built some 5000 qubit prototype chips then they will very soon in 2018.

Nextbigfuture believes that D-Wave is working on increased connectivity, improved qubits and other design improvements.

**50-100 Qubit general-purpose gate chips**

IBM announced a 50 qubit chip and Intel announced a 49 qubit chip. Rigetti Computing, Google and others will announce chips in the next three months that will be in the 45-60 qubit range. Nextbigfuture is expecting announcements later in 2018 in the range of 100 qubits.

2019 should see competition at the 200 qubit level.

IBM Quantum Experience in the cloud: 20 qubits at the end 2017 and a 50-qubit device has been built.

Intel announced a 49 qubit quantum computing chip at CES 2018.

Rigetti Computing has a 19 qubit chip. Rigetti should have a 50 or 60 qubit system in 2018.

Google 22-qubit device (superconducting circuit), 49 qubits expected in 2018.

Harvard 51-qubit quantum simulator (Rydberg atoms in optical tweezers).

Dynamical phase transition in Ising-like systems; puzzles in defect (domain wall) density.

UMd 53-qubit quantum simulator (trapped ions). Dynamical phase transition in Ising-like systems; high-efficiency single-shot readout of many-body correlators.

ionQ: 32-qubit processor planned (trapped ions), with all-to-all connectivity.

Microsoft: is 2018 the year of the Majorana qubit?

**Pushing to 1000 qubit range by 2021**

For today’s best hardware (superconducting circuits or trapped ions), the probability of error per (two-qubit) gate is about 1 per 1000, and the probability of error per measurement is about 1 per 100 (or better for trapped ions). We don’t yet know whether systems with many qubits will perform that well.

Naively, we cannot do many more than 1000 gates (and perhaps not even that many) without being overwhelmed by the noise.

There are other important metrics besides the number of qubits; in particular, the two-qubit gate error rate (currently over 1 per 1000) determines how large a quantum circuit can be executed with reasonable signal-to-noise.

There will be a great deal of effort to redesign qubits to achieve lower error rates. This would enable higher numbers of gates before the noise is overwhelming.

Eventually error correction will be needed. There will also be attempts to be more clever and efficient with error correction. Current designs need perhaps thousands of error correcting qubits per operating qubit.

**General Purpose competition**

Nextbigfuture believes that D-Wave will find the funding to convert to vastly lower noise qubits and to annealing designs that are capable of general purpose problem-solving.

The competition in 2020-2025 will be whether D-Wave still has ten to a hundred times more qubits and whose designs at the qubit and higher level is controlling or managing the noise better.