Memristors could challenge flash memory

The demise of flash memory at the hands of some new technological upstart has been predicted at least for the last decade. The latest pretender to the throne is the so-called memristor (also called resistive RAM, ReRAM, or RRAM). Of course, if you don’t like the term “memristor”, you can alternatively refer to it as “two-terminal non-volatile memory devices based on resistance switching.”

Now researchers at ETH Zurich have designed a memristor device out of perovskite just 5 nanometres thick that has three stable resistive states, which means it can encode data as 0,1 and 2, or a “trit” as opposed to a “bit.”

ACS Nano – Uncovering Two Competing Switching Mechanisms for Epitaxial and Ultrathin Strontium Titanate-Based Resistive Switching Bits

Resistive switches based on anionic electronic conducting oxides are promising devices to replace transistor-based memories due to their excellent scalability and low power consumption. In this study, we create a model switching system by manufacturing resistive switches based on ultrathin 5 nm, epitaxial, and grain boundary-free strontium titanate thin films with subnanometer surface roughness. For our model devices, we unveil two competing nonvolatile resistive switching processes being of different polarities: one switching in clockwise and the other in counterclockwise direction. They can be activated selectively with respect to the effective switching voltage and time applied to the device. Combined analysis of both processes with electrical DC-methods and electrochemical impedance spectroscopy reveals that the first resistive switching process is filament-based and exhibits counterclockwise bipolar resistive switching. The ROFF/RON resistance ratio of this process is extremely stable and can be tuned in the range 5–25 depending on the switching voltage and time. Excitingly, at high electric field strength a second bipolar resistive switching process was found. This process is clockwise and, therefore, reveals the opposite polarity switching direction when compared to the first one. Both processes do not obstruct each other, consequently, stable 1, 2, or even 3 crossover current–voltage (I–V) characteristics can be addressed for the memory bits. Equivalent circuit model analysis and fitting of impedance characteristics unequivocally show for the created grain boundary free switches that the oxide’s defects and its carrier distribution close to the electrode interface contribute to the resistive switching mechanism. The addressability of two sets of resistive ON and OFF states in one device through electric field strength and switching time offers exciting new operation schemes for memory devices.

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