Fujitsu and Japan’s Institute of Physical and Chemical Research, known as RIKEN, announced that RIKEN has decided to employ a new system configuration with a scalar processing architecture for its next-generation supercomputer. Despite the NEC/Hitachi withdraw, the plan is to get a “partially operational system” by late 2010, and the complete production system ready by 2012.
* Supercomputer will boast a performance of 10 petaflops upon completion in 2012, as initially planned
* Scalar system will be built from the world’s fastest CPUs (128 gigaflops)
* CPUs will feature error-recovery function; network will have excellent fault tolerance and operability
The system will adopt Fujitsu’s SPARC64
VIIIfx CPU (8 cores, 128 gigaflops), which is manufactured using the company’s 45-nm process technology. As the world’s highest-performance general-purpose CPU, the processor offers both performance and energy efficiency, achieving a computational speed of 128 gigaflops per CPU. The inclusion of an error-recovery function(7) also enhances its operability.
It’s doubtful Venus will hold that title when it is deployed in Japan’s prototype machine late next year. By 2010 the eight-core Power7 chips should be in the field, and IBM is saying those processors will deliver over 256 gigaflops per CPU. The Power7 will be used in the multi-petaflop “Blue Waters” supercomputer for NCSA, which is scheduled to be running full tilt in 2011. Even Intel’s Xeon chips should be well into triple-digit gigaflops when the Westmere 32nm Xeon processors hit the streets in 2010.
What may set Venus apart from its competition is its energy efficiency. Fujitsu is claiming the SPARC64_VIIIfx design allows it to operate at less than one-third the power of current Intel processors. The company didn’t specify which Intel parts they were referring to, but since even the high-end Itanium CPUs top out at about 122 watts, the Venus chip should draw no more than 40 watts or so.
Aside from Fujitsu silicon, the next-gen Japanese super will also feature a multidimensional mesh/torus network as well as custom system software to glue it all together. The fact that there will no longer be vector hardware to contend with will undoubtedly make this software simpler than it otherwise would have been.
But there will be some attempt to accommodate applications developed for NEC’s SX vector machines. According to the press announcement: “Although the next-generation supercomputer will consist only of scalar units, through the use of application parallelization and tuning it will support applications that have run on previous supercomputers with vector units. Other ways to assist users of vector-based supercomputers are also being considered.”
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