Nikkei reports Tadahiro Kuroda andresearchers from Toshiba and the Keio University in Tokyo have developed a technology that will help reduce the size of SSDs by more than ten times. The drives will cheaper and boosting energy efficiency by 70%.
They created a 1 Terabyte solid state drive prototype the size of a small postage stamp, consisting of 128 NAND flash memory chips and one controller chip. The miniature storage device boasts transfer speeds of 2 Gbps, and also uses radio communications which will ultimately make it cheaper to manufacture.
Universal Memory Challengers Unable to Breakthrough as Conventional Memory Continues to Advanced
* Fujitsu Ltd. and the University of Toronto presented a negative-resistance read scheme and write scheme for spin-torque-transfer (STT) MRAM, based on 130-nm technology.
* a 64-Mbit spin-transfer-torque MRAM in 65-nm CMOS was described by Toshiba Corp
* Numonyx BV described a 1-Gbit phase-change memory developed in 45-nm CMOS with a 37.5 square millimeter die size, and a 266-Mbyte per second read throughput
* Flash and DRAM memory continue to move to higher density (20 nanometer lithography and lower and higher density flash configurations )